1. Field of the Technical Disclosure
The present disclosure relates generally to analog to digital converters (ADC), and more specifically to an ADC with improved input overload recovery.
2. Related Art
Analog to Digital Converters (ADCs) are used to generate a sequence of digital codes representing the strength of an input signal at corresponding time instances. ADCs may be implemented using any of several approaches such as successive approximation register (SAR) ADC, pipeline ADC etc well known in the relevant arts.
An ADC may be designed to receive input signals with strengths (e.g., voltage and/or current magnitudes, etc.) lying within a range, termed full-scale range of the ADC. For example, assuming a full-scale range of 0 to 1 Volts, the minimum possible output value of 0 may correspond to an input of 0 volts and maximum possible output value of ((2^16)−1) may correspond to the maximum voltage of 1 volts.
ADCs often encounter input overload conditions. An input overload condition corresponds to a situation in which the input signal strength has a strength beyond/outside the full-scale range. In the illustrative example of above, an input overload condition exists if the input sample has a voltage exceeding 1 volts or below 0 volts.
One problem with input overload condition is that it may cause internal components, such as amplifiers, contained in an ADC to be driven to operation in a saturation region. As a consequence, the outputs (of internal circuits such as amplifiers) in the ADC may not accurately represent the input signal for a period of time (generally termed recovery time) even after the input signal strength returns to being within the full-scale range.
Therefore, when the input signal changes from an overloaded signal to a signal that is within the normal full scale range, the ADC may not be able to recover fast enough, and the digital codes generated by the ADC may not be accurate at least for a duration equal to the recovery time (generally, the first few clock cycles after the overload signal has ended).
Several aspects of the present invention provide an ADC which addresses one or more of the problems noted above.